The present invention relates to a switching circuit of the monolithic IC type.
FIG. 2 shows a circuit diagram of the conventional switching circuit. Input terminals 1 and 2 receive different voltages V1 and V2, respectively. Either of the received voltages is outputted from an output terminal 5 through corresponding switching transistors 3 and 4. The voltages V1 and V2 are inputted into a comparator 6. The comparator 6 produces an output which is concurrently applied to a gate of the switching transistor 4 and to a gate of the other switching transistor 3 through an inverter 7.
In a condition where V1&gt;V2, the comparator 6 produces an output having a high level so that the switching transistor 4 is turned off or placed in a non-conductive switching state. On the other hand, the output of the inverter 7 is held at a low level so that the other switching transistor 3 is turned on or placed on a conductive switching state. Consequently in this condition, the output terminal 5 provides the voltage V1. In a condition where V1&lt;V2, the switching states of the switching transistors 3 and 4 are reversed so that the output terminal 5 provides the voltage V2. The comparator 6 and the inverter 7 are powered from the output terminal 5.
However, in this circuit construction, it is impossible to turn off both of the switching transistors so as to place the output terminal 5 in a floating state. The reason is that the switching transistor of the MOS type is structurally accompanied with a parasitic diode having an anode coupled to either of the input terminals 1 and 2 and a cathode coupled to the output terminal 5. Therefore, the output terminal 5 receives through the parasitic diode a voltage equal to the higher one of the input voltages minus the voltage drop across the parasitic diode. This voltage is effective to operate the comparator 6 and the inverter 7 to enable the same to turn on and off the switching transistors 3 and 4 to thereby constitute a current path having a voltage drop smaller than the voltage drop across the parasitic diode.
For the above described reason, the output terminal 5 necessarily provides the higher one of the voltages V1 and V2, thereby causing a problem that the floating state cannot be realized.